Optimizing Video Scalers Using Real-time Verification Techniques

Video hardware design is slowly becoming top money grosser for many semiconductor companies. As per statistics the video industry involved in content broadcasting and format change alone has become almost a $1 Billion dollar industry in the United States. And now with the advent of 3D televisions, video gaming etc. this industry is bound to grow even more. Video based designs almost completely rely on algorithms for post/pre processing, asynchronous bridges etc. With so many applications and devices to view this content on, video scaling is an integral aspect of the complete video pipeline. All video consumer devices will have a scaler at their I/O interface. The quality of scaled input will determine performance of the complete video engine. Then why have a video scaler? Why not simply use the full frame instead? This would indeed be an obvious choice in such scenarios. Though keeping optimization in mind, a certain tradeoff needs to be met in between performance and memory requirements. In this project, we present a novel scheme of using a verification-­based checker module to automate this tradeoff while also maintaining low power consumption.